3D TSV-Micro-Bump-RDL Interconnect Design at 60 GHz S-Parameters, Crosstalk & Eye Diagram Ansys HFSS 2024 R2
Use broadband full-wave S-parameters to examine insertion loss, return loss, inter-lane coupling and channel eye-diagram sensitivity in TSV–micro-bump–RDL links. This video-first project page describes what to inspect in the demonstration and which modelling checks would support a reproducible technical report.
Watch the simulation or tutorial: Use broadband full-wave S-parameters to examine insertion loss, return loss, inter-lane coupling and channel eye-diagram sensitivity in TSV–micro-bump–RDL links.
What this 3D-IC Interconnect Signal Integrity demonstration investigates
At 60 GHz, transition discontinuities, return-current paths and coupling are important; interpreting insertion loss without port and reference-plane control can be misleading.
Use broadband full-wave S-parameters to examine insertion loss, return loss, inter-lane coupling and channel eye-diagram sensitivity in TSV–micro-bump–RDL links.
Modelling environment
Ansys HFSS 2024 R2
Specific research category
3D-IC Interconnect Signal Integrity
Publication context
Simulation walkthrough and methodology discussion; verify reported plots against the original model files.
Model architecture and components
- TSV signal and return vias with dielectric stack and conductor dimensions
- micro-bump landing pads and redistribution-line transitions
- multiport wave or terminal excitation and renormalization
- frequency sweep with touchstone export for channel simulation
Recommended simulation methodology
- Check geometry continuity, conductor and substrate loss models, port definitions and reference impedances.
- Run convergence controls across the intended full-wave frequency band and export consistent multiport S-parameters.
- Extract differential insertion loss, return loss and near/far-end crosstalk from port mappings.
- Connect the S-parameter network to a separately specified transmitter/receiver/equalization flow for eye analysis.
Scopes, plots and evidence to validate
- Sdd21 insertion loss and Sdd11 return loss
- mode conversion and crosstalk terms
- port-to-port isolation versus frequency
- time-domain eye opening and jitter with stated signaling assumptions
- passivity, causality and mesh convergence
Research novelty and interpretation
Explicitly separates genuine HFSS full-wave outputs from downstream transient eye simulations; an eye diagram is not a default HFSS S-parameter plot.
When comparing control or modelling strategies, keep plant parameters, external disturbances and measurement windows identical. Any gain, loss or accuracy figure should be derived from the recorded simulation or measurement, not inferred from the project title.
Related technical article
For modelling assumptions, experiment design and thesis-ready comparison criteria, read the research guide.
Read 60 GHz TSV–Micro-Bump–RDL Signal Integrity: S-Parameters to Eye DiagramQuestions research scholars should consider
What distinguishes this project from a generic simulation?
Explicitly separates genuine HFSS full-wave outputs from downstream transient eye simulations; an eye diagram is not a default HFSS S-parameter plot.
Which plots should be included in the results section?
At minimum, report Sdd21 insertion loss and Sdd11 return loss, mode conversion and crosstalk terms and port-to-port isolation versus frequency. Include baseline and sensitivity cases where applicable.
How should I verify the implementation?
Document model versions, initialization, numerical settings, units, boundary conditions and controlled comparisons. Treat any interpretation as provisional until plots and source models have been checked.
Engineering research and thesis support worldwide
Researchers in the UK, Australia, Germany, Canada, Singapore and USA can use this technical guide to define reproducible simulation objectives, benchmark cases, plots and a transparent methodology. Work should follow the academic integrity and AI-use policies of the relevant university.